INN3649C-H606 based 62Watt and 42Watt Design

Posted by: harshad.rank on 07/27/2023

As per requirement need to generate SMPS design from 150VAC to 500VAC supply range for more than 60Watt.

So, I have selected INN3649C-H606 device which cover the input range.

PI Onine do not support this device so taken reference from other low voltage design.

I have attached the schematic as well as transformer design. Will it work ?

Files

Attachment	Size
InnoSwitch3-EP_PIDesign_EE35_Transformer Construction.pdf	1.37 MB
InnoSwitch3-EP_PIDesign_EER28_Transformer Construction.pdf	1.33 MB
INN_SMPS_SVG_01.pdf	326.24 KB

Comments

Hi Harshad,

Thanks for using PI products. You can use INN36X9 in device selection disregarding the primary voltage stress (VDRAIN_OFF_PRSW).

Mark

As shown in the Inno3-EP datasheet, the maximum input voltage is 400 VAC for the 900 V PowiGaN Switch.

500 VAC input is too high for the 900 V PowiGaN devices.

Hi Skywalker

Harshad will be using INN3649C-H606 which is 1700V rated with Input range from 85VAC-670VAC.

Thanks for comments

Could you please comment on earlier attached schematic and transformer design?

Can we go ahead with schematic(INN_SMPS_SVG_01.pdf) and transformer design?

regards

Harshad Rank

Hi Harshad,

You are going to use the same INN3649 with increased current limit for both 42 W and 62 W application.

Effective Input capacitance can be reduced to 200 uF from 470 uF

With 1700 V device,

1. For 42 W design,
  1. Recommended to review your PIXL data
  2. Primary inductance can be around 300 uH, not 500 uH
  3. VOR value can be higher to lower the FWD and SR FET voltage stress,
  4. It is recommended to add 330 pF between FWD and GND pins to lower the FWD voltage stress during start up
2. For 62 W design
  1. VOR value can be higher to lower the FWD and SR FET voltage stress,
  2. It is recommended to add 330 pF between FWD and GND pins to lower the FWD voltage stress during start up

Hi Skywalker,

Yes we are going to use the same INN3649 with increased current limit for both 42 W and 62 W application.
Yes we will reduce Input capacitance to 220uF from 470uF

With 1700 V device,

For 42 W design,

Recommended to review your PIXL data

In our design there is -15V output so with PIXL, when we select -15V then it shows problem: Calculation error has occurred.

2. Primary inductance can be around 300 uH, not 500 uH

We can change VOR to up to 125, if we we go higher than that then it gives warning to decrease FS. At VOR value to 125 Primary inductance goes down to 449uH from 461uH.

3. It is recommended to add 330 pF between FWD and GND pins to lower the FWD voltage stress during start up

Ok we will add 330 pF between FWD and GND pins.

For 62 W design

It is recommended to add 330 pF between FWD and GND pins to lower the FWD voltage stress during start up

Ok we will add 330 pF between FWD and GND pins.

Note: We have generated this design using PI Expert 10.3 (for 900V Device and same used with 1700V Device)

regards

Harshad Rank