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Inductor Design for StackFET application

Posted by: Pranit on

Hi,

My question is on Magnetics design. The application is a high VDC 20W flyback converter. 

I'm modifying the inductor of my current stackFET prototype I used PIXIs for inductor design (attaching the design result)
Full-load operation: With this inductor, I observed controller hits ILIM fault at VDC>700V (Ipri>ILIM). 
Q1. I observed that the controller changes duty inversely with VDC (maintaining constant L*di). However, after a certain VDC, primary current fault triggers. I'm confused how is this happening given that a (y=1/x) relation between VDC-Duty is verified? 
Q2. How is the inductance calculated by PIXIs?   And given the wide input range, how do I design for higher switching freq operation?
Q3. I observed the freq changes with "depth of DCM", i.e. as DCM increases, the freq. reduces (ultimately capping at 25kHz).  What is the exact relation between freq and DCM depth?

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InnoSwitch3-CE Flyback Design1.pdf 109.72 KB

Comments

Submitted by Pranit on 04/10/2024

Q4. n a previous post it was mentioned that switching frequency isn't explicitly set. It is an effect of secondary requesting pri switching. So, what is the condition for this request? When does secondary request pri switching under normal operation? 

Submitted by PI-Radiant on 04/11/2024

Hello Pranit, INN3168 is a 650V rated device. Since the input is your design is 2kV, the voltage rating of your StackFET device might be very large (>1.5kV).

For your design, we recommend using INN3947CQ which is rated for 1700V. This will help considerably reduce the voltage rating of StackFET used and also have lower Rds(on).

With InnoSwitch family of devices, primary current and switching frequency follow the RTM curve given in Page 4 of datasheet. Please find the responses to your specific questions below.

  1. With InnoSwitch devices, for a given inductor design, load, output voltage, switching frequency  and primary peak current don't vary much with line voltage. However, duty cycle varies inversely with line voltage. 

    Based on your PIXls design, max switching frequency is being fixed at just 25kHz. You may remove "25000" entered in the gray box. Initially, you may let PIXLs automatically calculate this for you. Later you may modify it retune the transformer values (such as Bpeak, Lpri etc)

     VMIN is the minimum DC input voltage across the bulk cap. You may replace "2000" VDC with "200" VDC. 

    Kindly provide more details on what you mean by ILIM fault in the primary

  2. As mentioned earlier, peak current on primary and Switching frequency are related as shown in the RTM curve. The device chosen determines ILIM.

    Inductance (Lpri) is calculated using the formula: 1/2*Lpri*Ipk^2*fs = Pout/efficiency

    3. DCM depth is given by the ratio of Primary switch off-time to Secondary diode conduction-time. If this ratio is 1, it's defined as CCM-DCM boundary condition - where primary current starts from zero and there would be no DCM rings. If DCM depth increases, one would observe more DCM ringing, which in effect reduces switching frequency (with all other factors kept constant)

    4. When scaled output voltage reduces below the Feedback pin voltage, switching request is sent by secondary to primary through Flux link

    Hope this helps. 

    Regards

    PI-Radiant

Submitted by Pranit on 04/12/2024

Thank you for the information! It was helpful.

Adding to your reply -

  1. I entered VMIN=2000v to see the pri ON time. I think PIXIs, considers most CCM operation as worst case (from loss perspective?). In my case, most DCM point is the worst case (as my ckt is experiencing shutdown as DCM depth increases). So I was trying to understand whether it has anything to do with pri side ON time being too low for controller to produce/react to
  2. The shutdown mentioned earlier was due to pri current exceeding ILIM (this is what I mean by ILIM fault). This is also one of my questions - if duty and VDC vary inversely, it implies L*di term remains constant (V=L*di/dt). Which means di should remain constant through out VDC range, and there shouldnt have been a Ipri>Ipri(LIM) fault. But I experience this shutdown after a certain VDC (for a given Lpri, load value). How do I proceed further from this?
  3. In one iteration, I let PIXIs decide fsw (70kHz) and adjusted Lpri (0.25mH) accordingly in my ckt. For 2000VDC the ton=0.23us. However, stackFET trise/tfall is ~150ns. How much margin is recommended? What iterative steps shall I take further?
  4. In (1/2)*Lpri*Ipk^2*fs, how is the Ipk and fs calculated (or recommended) in PIXIs ?
Submitted by PI-Radiant on 04/12/2024
  1. With very high Vin, for a given ILIM, Ton might be too small - smaller than minimum Ton of primary FET
  2. Due to leading edge blanking time, with the very high input voltage, current quickly exceeds ILIM. Kindly try redesigning with a different ILIM device size like INN3947CQ. This will effectively modify the transformer design as well (it is good to maintain in the range of 1 to 2). Very high or low Kp is usually not suggested  
  3. Ton of atleast 500ns is recommended (considering leading edge blanking time of Primary FET)
  4. Once maximum fs is specified (or PIXls takes a default value), Ipk for the particular device chosen is determined from the RTM curve. Lpri is eventually calculated using the formula (1/2)*Lpri*Ipk^2*fs = Pout/Efficiency
Submitted by PI-Radiant on 04/12/2024
  1. With very high Vin, for a given ILIM, Ton might be too small - smaller than minimum Ton of primary FET
  2. Due to leading edge blanking time, with the very high input voltage, current quickly exceeds ILIM. Kindly try redesigning with a different ILIM device size like INN3947CQ. This will effectively modify the transformer design as well (it is good to maintain in the range of 1 to 2). Very high or low Kp is usually not suggested  
  3. Ton of atleast 500ns is recommended (considering leading edge blanking time of Primary FET)
  4. Once maximum fs is specified (or PIXls takes a default value), Ipk for the particular device chosen is determined from the RTM curve. Lpri is eventually calculated using the formula (1/2)*Lpri*Ipk^2*fs = Pout/Efficiency
Submitted by Pranit on 04/12/2024

Thank you for this! I'll go ahead with your recommended INN3947CQ, with redesigned inductor for Kp: 1-2

What is the typical blanking time for pri current sensing? 

Submitted by PI-Radiant on 04/12/2024

Hi Pranit, its around 250ns

Submitted by Pranit on 04/17/2024
  1. How is the Primary FET Ton calculated? And is the switching frequency range 25kHz-95kHz?
  2. I noticed as fsw decreases, Lm increases. What if in actual circuit, Lm chosen is such that fsw, theoretically, goes below the min possible fsw. What does the controller do in that case?
Submitted by PI-Radiant on 04/17/2024

Hi Pranit

 Please find the response to your questions below:

  1. Based on the max switching frequency entered by user and device chosen (determines ILIM), Lm is calculated to supply the required output power. 

    For any given load condition (between 0% to 100% load), using the Lmag calculated earlier, switching frequency (and hence Ipk) are calculated. With these in hand, Ton can be calculated for a given input voltage using the formula: Ton = Lm*Ipk/Vin_DC

    Switching frequency can vary between few Hz at No load to ~110kHz (overload frequency - refer datasheet for more details on this)

  2. To support the required output power, as fsw decreases, Lm needs to increase to satisfy 1/2*Lm*Ipk^2*fs = Pout/Efficiency
Submitted by Pranit on 04/18/2024

Thank you Pi-Radiant, this is helpful
1. The datasheet mentions that it is a unique feature that for full load, the designer can set the switching frequency to between 25 kHz to 95 kHz..  I'm confused. Datasheet mentions min fsw 25kHz (with load), but from the Lm formula, if a high enough Lm is used, switching frequency can and will go below 25kHz (theoretically). Could you clarify if practically, the IC has a minimum fsw value (with load)?

Submitted by PI-Radiant on 04/18/2024

Hi Pranit, as the section heading mentions, it is a recommendation for transformer design. 

As you mentioned, if Lm is high enough, switching frequency could go below 25kHz and the power supply can operate in this condition without any issue.

Since the human audible range is 20 Hz to 20kHz, it is recommended to design with a switching frequency above this value

Submitted by Pranit on 04/18/2024

Understood, Thank you for clarifying! :D