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Ceramic Capacitor for Bias Winding with InnoSwitch-CE

Posted by: powerlion on

Hi, I have a 15W universal input design with INN3164C. In the past, I have seen some chips (like UCC28742 from TI, please see attached image for same design) use a ceramic capacitor for the bias winding output.

To put things in perspective, PI Expert Web has specified Panasonic, EEH-ZA1V220R, a 22uF, 35V, Gen Purpose, 5KHrs Capacitor (vs  a TDK C2012X7R1V475K125AC 4.7uF 35V MLCC)



Here are design results for bias winding.

Var Value Units Description
VBMIN 11.4 V Minimum Bias Voltage
VBMAX 30.8 V Maximum Bias Voltage
Circuit Type Simple Resistor   Bias Circuit Type
PIVB 71 V Bias Rectifier Maximum Peak Inverse Voltage
NB 10  

Primary Bias Winding Number of Turns



I was wondering if we really need 22uF of capacitance for bias output?



Can we reduce the capacitance for example, to 10-15uF MLCC and do a similar thing with INN3164C? And if so why(cost/space/lifetime/DC-bias/etc.) doesn't PI expert specify it? 



I am aware of the DC bias characteristics of the MLCC. How much capacitance do we really need for stable operation of INN3164C?

Thanks!

Files

Attachment 大小
Ceramic Cap TI UCC28742.png 124.24 KB

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Submitted by powerlion on 03/21/2023

More food for thought, DER-717 a 15W Design using exact chip i.e. INN3164C is using a 10uF cap UPW1H100MDD6, though not ceramic. The design document illustrates thorough testing with 10uF cap at 50'C(good enough for my application) ambient.



My hunch seems to point in the right direction. Anybody with some experience?

Submitted by PI-Prowler on 03/26/2023

Hi sharm152,

The 22 uF electrolytic capacitor is generally the recommended capacitor to use for the primary bias winding.(See Page 18 of the Application Note 72 -InnoSwitch3 family design guide)

Using a low esr electrolytic capacitor can reduce no-load input power. In addition to this, using a surface mount ceramic capacitor could create audible noise due to piezoelectric effect.

For the capacitance, using a lower value can increase the ripple of the primary bias winding voltage (Vbias_primary), which could mean that the minimum Vbias_primary becomes lower. Generally, Vbias_primary must be high enough to be able to constantly supply the necessary BPP pin current (See Page 20 of the InnoSwitch3-CE family datasheet)

If the effects of using a ceramic capacitor can be waived and the Vbias_primary is ensured to supply the necessary BPP current at all loading conditions, then using a different capacitor is possible.