Hi NAOHI,

ZVS is achieved with InnoSwitch4-CZ by turning on the high side switch of the ClampZero for a fixed time of 500 ns. The switch then turns off and a delay time is added to allow the drain node capacitance to discharge for ZVS. This delay time is tLLDL low line input conditions while it is tHLDL (500 ns) for high line conditions (applies to INN407xC Family devices). tLLDL in this case can be programmed and one can observe whether primary switch ZVS is observed for both CCM and DCM condition in low line. 

During CCM operation, the leakage inductance of transformer provides the energy to bring down the primary drain voltage for ZVS. For DCM operation, both the magnetizing and leakage inductance of the transformer provides the energy for ZVS. Since the leakage inductance is much smaller than the magnetizing inductance, the discharge rate of the drain voltage is much faster during CCM than in DCM, given both conditions have the same input voltage and VOR.

On the other hand, when comparing low line and high line input given the same conduction mode (both conditions in CCM or in DCM), the necessary delay time at low line input is less compared to high line input because the drain voltage is lower. This means that the necessary delay time at low line DCM is expected to be less than tHLDL.

Since the necessary delay time will depend mainly on the drain voltage, drain node capacitance, and the transformer inductance, the transformer design can also be adjusted to achieve ZVS during low line DCM given the allowable values for tLLDL (80 ns - 140 ns).

I hope to have provided an answer to your concern. Thank you for using PI Forum.

Hi!

Thank you for your thorough explanation.
I understood well.

Best regards,